High activity, spatially distributed radiation source for accurately simulating semiconductor device radiation environments

ABSTRACT

The present invention pertains to radiation sources that mimic radiation environment(s) encountered by packaged semiconductor devices. The sources are suitable for use in test systems operative to test for soft error and/or failure rates in devices sensitive to such radiation. The radiation is highly active to exacerbate soft error rates and thereby accelerate testing and reduce test times. The sources are also relatively uniformly distributed within a medium to simulate the direction(s) and energy spectra of radiation that would actually be encountered by semiconductor devices in device operation.

FIELD OF INVENTION

The present invention relates generally to semiconductor technologiesand more particularly to radiation sources that mimic radiationenvironment(s) encountered by packaged semiconductor devices tofacilitate accelerated soft error or other radiation effects testing.

BACKGROUND OF THE INVENTION

Several trends presently exist in the semiconductor device fabricationindustry and in the electronics industry. Devices are continuallygetting smaller, faster and requiring less power, while simultaneouslybeing able to support a greater number of increasingly sophisticatedapplications. One reason for these trends is that there is an everincreasing demand for small, portable and multifunctional electronicdevices. For example, cellular phones, personal computing devices, andpersonal sound systems are devices which are in great demand in theconsumer market. These devices rely on one or more small batteries,which are generally rechargeable, as a power source and also require anever increasing storage capacity to store data, such as digital audio,digital video, contact information, database data and the like.

To achieve these and other ends, a continuing trend in the semiconductormanufacturing industry is toward producing smaller and faster transistordevices, which consume less power and provide more memory density.Integrated circuits (ICs) are thus continually designed with a greaternumber of layers and with reduced feature sizes and distances betweenfeatures (e.g., at sub micron levels). This can include the width andspacing of interconnecting lines, the spacing and diameter of contactholes, and the surface geometry such as corners and edges of variousfeatures. The scaling-down of integrated circuit dimensions canfacilitate faster circuit performance, more memory and can lead tohigher effective yield in IC fabrication by providing more circuits on adie and/or more die per semiconductor wafer.

Semiconductor based products (e.g., DSP's, microprocessors) can includeand be utilized on a variety of different items including one or moredifferent types of memory, such as static random access memory (SRAM),dynamic random access memory (DRAM) and/or embedded memory, as well aslogic such as latches, flip-flops and/or combinatorial logic thatinterconnects memory to cache(s). Respective types of memory generallyinclude thousands or millions of memory cells, adapted to individuallystore and provide access to data. A typical memory cell stores a singlebinary piece of information referred to as a bit. The cells are commonlyorganized into multiple cell units such as bytes which generallycomprise eight cells, and words that may include sixteen or more suchcells, usually configured in multiples of eight. Storage of data in suchmemory device architectures is performed by writing to a particular setof memory cells, sometimes referred to as programming the cells.Retrieval of data from the cells is accomplished in a read operation. Inaddition to programming and read operations, groups of cells in a memorydevice may be erased.

The erase, program, and read operations are commonly performed byapplication of appropriate voltages to certain terminals or nodes of thecells. In an erase or program operation the voltages are applied so asto cause a charge to be stored in the memory cells. In a read operation,appropriate voltages are applied so as to cause a current to flow in thecells, wherein the amount of such current is indicative of the value ofthe data stored in the respective cells. The memory devices includeappropriate circuitry to sense the resulting cell currents in order todetermine the data stored therein, which may then be provided to databus terminals for access by other devices in a system in which thememory device is employed.

As the dimensions and operating voltages of electronic devices arereduced to satisfy the ever-increasing demand for higher density andlower power, their sensitivity to radiation increases dramatically.Radiation can, directly or indirectly, induce localized ionizationevents capable of upsetting internal data states. While the upset causesa data error, the circuit itself is undamaged; thus this type of eventis called a “soft” error and the rate at which these events occur iscalled the soft error rate (SER). It has been established that SER insemiconductor devices is induced by three different types of radiation;alpha particles, high-energy neutrons from cosmic radiation, and/or theinteraction of cosmic ray thermal neutrons and 10B in devices containingborophosphosilicate glass.

SUMMARY OF THE INVENTION

The following presents a simplified summary of the invention in order toprovide a basic understanding of some aspects of the invention. Thissummary is not an extensive overview of the invention. It is intendedneither to identify key or critical elements of the invention nor todelineate the scope of the invention. Rather, its purpose is merely topresent one or more concepts of the invention in a simplified form as aprelude to the more detailed description that is presented later.

One or more aspects of the present invention pertain to radiationsources that mimic radiation environment(s) encountered by packagedsemiconductor devices. The sources are highly active to exacerbate softerror rates and thereby accelerate testing and reduce test times. Thesources are also spatially distributed within a medium to simulate thespectra of radiation emitted from device packaging.

According to one or more aspects of the present invention, a method offorming a radiation source is disclosed. The radiation source issuitable for use in a test system operative to test for soft error orfailure rates in one or more semiconductor devices where the devices mayfail as a result of exposure to test radiation from the test radiationsource, and more particularly where respective charge sensitive nodes ofthe devices, which experience ever decreasing capacitances and voltagesas device scaling occurs, are adversely affected by exposure to the testradiation, wherein the test radiation mimics radiation that the deviceswould actually encounter in practice. The method includes substantiallyuniformly distributing one or more radioisotopes into a matrix materialto a specific depth from the surface, wherein the radioisotopes act asemission sites and emit the test radiation.

According to one or more other aspects of the present invention,substantially uniformly distributing one or more radioisotopes into amatrix material includes depositing a layer of the one or moreradioisotopes onto a top surface of the matrix material and subjectingthe matrix material and the layer of radioisotopes to a high temperatureanneal to cause at least some of the radioisotopes to move down toward abottom surface of the matrix material.

In accordance with one or more other aspects of the present invention,the one or more radioisotopes have a relatively short half life suchthat the devices experience an increased exposure to the test radiationas compared to the amount of the radiation that the devices wouldactually receive in device operation, and such that the devices exhibitan enhanced soft error rate so that testing time is thereby reduced.

In accordance with yet one or more other aspects of the presentinvention, the test radiation is emitted from the bottom surface of thematrix material and wherein the substantially uniform distribution ofthe radioisotopes allows the radiation to encounter the one or moresemiconductor devices being tested at a wide variety of angles and witha variety of different energies similar to what would actually beencountered in practice.

According to one or more other aspects of the present invention, aradiation source is disclosed. The radiation source is suitable for usein a test system operative to test for soft error or failure rates inone or more semiconductor devices where the devices may fail as a resultof exposure to test radiation from the test radiation source, and moreparticularly where respective charge sensitive nodes of the devices,which experience ever decreasing capacitances and voltages as devicescaling occurs, are adversely affected by exposure to the testradiation, wherein the test radiation mimics radiation that the deviceswould actually encounter in device operation. The test radiation sourceincludes a matrix material and one or more radioisotopes substantiallyuniformly distributed within the matrix material, wherein theradioisotopes act as emission sites and emit the test radiation.

To the accomplishment of the foregoing and related ends, the followingdescription and annexed drawings set forth in detail certainillustrative aspects and implementations of the invention. These areindicative of but a few of the various ways in which one or more aspectsof the present invention may be employed. Other aspects, advantages andnovel features of the invention will become apparent from the followingdetailed description of the invention when considered in conjunctionwith the annexed drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a plan view of an exemplary memory device.

FIG. 2 illustrates an exemplary DRAM memory device in schematic blockdiagram form.

FIG. 3 illustrates in schematic block diagram form a test systemsuitable for testing for and/or characterizing soft error or failurerates in semiconductor devices according to one or more aspects of thepresent invention.

FIG. 4 illustrates in perspective view a wire bond type connection of asemiconductor device that is not yet shrouded within a packagingmaterial.

FIG. 5 illustrates in perspective view an exemplary semiconductor devicesuch as that depicted in FIG. 4, but encapsulated within a packagingmaterial.

FIG. 6 illustrates in perspective view a flip-chip type sub-assembly ofa semiconductor device not yet shrouded within a packaging material.

FIG. 7 is a cut away side view illustrating a coupling of a flip-chipsub-assembly, such as that depicted in FIG. 6, to another component viathe use of solder balls.

FIG. 8 is a cut away side view illustrating an operative interconnectionbetween bond pads of a flip-chip sub-assembly, such as that depicted inFIG. 6, and contact pads of another component via the use of solderballs.

FIG. 9 is a cut away side view illustrating fashioning of a radiationsource according to one or more aspects of the present invention.

FIG. 10 is a cut away side view depicting a radiation source fashionedin accordance with one or more aspects of the present invention.

FIG. 11 is a graphical depiction of an exemplary particle energyspectrum generated from a radiation source fashioned in accordance withone or more aspects of the present invention.

FIG. 12 is a cut away side view depicting a radiation source wherein aplurality of emission sites are located near a bottom surface of a layerof matrix material that encapsulates the sites.

FIG. 13 is a graphical depiction of an exemplary alpha particle energyspectrum from a radiation source, such as that depicted in FIG. 12.

FIG. 14 is a graphical depiction of an exemplary alpha spectrum from asubstantially thick sample of Thorium.

FIG. 15 is a graphical depiction of an exemplary alpha spectrum from athin film of Thorium.

FIG. 16 illustrates a flow diagram of a methodology for fashioning aradiation source suitable for use in a test system adapted to test forsoft error or failure rates in one or more semiconductor devices inaccordance with one or more aspects of the present invention.

FIG. 17 illustrates a flow diagram of a methodology for utilizing aradiation source such as that disclosed herein in a test system adaptedto test for soft error or failure rates in one or more semiconductordevices or elements in accordance with one or more aspects of thepresent invention.

DETAILED DESCRIPTION OF THE INVENTION

One or more aspects of the present invention are described withreference to the drawings, wherein like reference numerals are generallyutilized to refer to like elements throughout, and wherein the variousstructures are not necessarily drawn to scale. In the followingdescription, for purposes of explanation, numerous specific details areset forth in order to provide a thorough understanding of one or moreaspects of the present invention. It may be evident, however, that oneor more aspects of the present invention may be practiced with a lesserdegree of these specific details. In other instances, structures anddevices are shown in block diagram form in order to facilitatedescribing one or more aspects of the present invention.

One or more aspects of the present invention relate generally tosemiconductor devices that include and are utilized in, among otherthings, memory, such as static random access memory (SRAM) and/ordynamic random access memory (DRAM), and logic devices, such as latches,flip-flops and/or other combinatorial logic that, among other things,interconnects memory and cache(s). Such semiconductor devices and/orelements or components thereof possess charge-sensitive interconnectionsor nodes that can be affected by exposure to radiation which can causethe devices to experience increased soft error rates. The sensitivity ofthese interconnections or nodes to the radiation is continuallyincreasing as a result of scaling whereby critical voltages andcapacitances are continually being reduced.

More particularly, one or more aspects of the present invention pertainto test systems and associated methodologies that are utilized tocharacterize or develop soft error or failure rate data forsemiconductor devices. Even more particularly, one or more aspects ofthe present invention pertain to radiation sources that mimic radiationenvironment(s) encountered by packaged semiconductor devices. Thesources are highly active to exacerbate soft error rates and therebyaccelerate testing and reduce test times. The sources are also spatiallydistributed within a medium to simulate the spectra of radiation emittedfrom device packaging.

By way of example, it will be appreciated that electronic memory devicesinclude a plurality of individual cells that are organized intoindividually addressable units or groups such as bytes or words, whichare accessed for read, program, or erase operations through addressdecoding circuitry, whereby such operations may be performed on thecells within a specific byte or word. The memory devices includeappropriate decoding and group selection circuitry to address such bytesor words, as well as circuitry to provide voltages to the cells beingoperated on in order to achieve the desired operation.

In a random access memory (RAM), for example, an individual binary datastate (e.g., a bit) is stored in a volatile memory cell, wherein anumber of such cells are grouped together into arrays of columns androws accessible in random fashion along bitlines and wordlines,respectively, wherein each cell is associated with a unique wordline andbitline pair. Address decoder control circuits identify one or morecells to be accessed in a particular memory operation for reading orwriting, wherein the memory cells are typically accessed in groups ofbytes or words (e.g., generally a multiple of 8 cells arranged along acommon wordline). Thus, by specifying an address, a RAM is able toaccess a single byte or word in an array of many cells, so as to read orwrite data from or into that addressed memory cell group.

Two major classes of random access memories include dynamic (e.g., DRAM)and static (e.g., SRAM) devices. For a DRAM device, data is stored in acapacitor, where an access transistor gated by a wordline selectivelycouples the capacitor to a bit line. DRAMs are relatively simple, andtypically occupy less area than SRAMs. However, DRAMs require periodicrefreshing of the stored data, because the charge stored in the cellcapacitors tends to dissipate. Accordingly DRAMs need to be refreshedperiodically in order to preserve the content of the memory. SRAMdevices, on the other hand, do not need to be refreshed. SRAM cellstypically include several transistors configured as a flip-flop havingtwo stable states, representative of two binary data states. Since theSRAM cells include several transistors, however, SRAM cells occupy morearea than do DRAM cells. However, SRAM cells operate relatively quicklyand do not require refreshing and the associated logic circuitry forrefresh operations.

Other types of memory also exist, such as Flash and EEPROM, whichovercome a disadvantage of SRAM and DRAM devices, namely volatility.SRAM and DRAM devices are said to be volatile as they lose data storedtherein when power for such devices is removed. For instance, the chargestored in DRAM cell capacitors dissipates after power has been removed,and the voltage used to preserve the flip-flop data states in SRAM cellsdrops to zero, by which the flip-flop loses its data. Flash and EEPROMdevices are said to be non-volatile as they do not lose data storedtherein when power is removed. However, these types of memory deviceshave operational limitations on the number of write cycles. Forinstance, Flash memory devices generally have life spans from 100K to10MEG write operations.

Table 1 illustrates some exemplary differences between different typesof memory. TABLE 1 FRAM Property SRAM Flash DRAM (Demo) Voltage >0.5 VRead >0.5 V >1 V 3.3 V Write (12 V) (±6 V) Special Transistors NO YESYES NO (High Voltage) (Low Leakage) Write Time <10 ns 100 ms <30 ns 60ns Write Endurance >10¹⁵ <10⁵ >10¹⁵ >10¹³ Read Time (single/ <10 ns <30ns <30 ns/<2 ns 60 ns multi bit) Read Endurance >10¹⁵ >10¹⁵ >10¹⁵ >10¹³Added Mask for 0 ˜6-8 ˜6-8 ˜3 embedded Cell Size (F˜metal ˜80 F² ˜8 F²˜8 F² ˜18 F² pitch/2) Architecture NDRO NDRO DRO DRO Non volatile NO YESNO YES Storage I Q Q P

Turning now to FIG. 1, a plan view of an exemplary memory device 100 isdepicted. The memory device 100 may comprise one or more core regions102 and a peripheral portion 104 on a single substrate 106. The coreregions 102 typically comprise at least one M×N array of individuallyaddressable, substantially identical memory cells. The peripheralportion 104 typically includes, among other things, logic elements, suchas gates, registers, flip-flops and latches that are effective to, amongother things, form input/output (I/O) circuitry and/or other circuitrythat facilitates selectively addressing the individual cells (e.g.,decoders for connecting source, gate and drain regions of selected cellsto predetermined voltages or impedances to produce designated operationsof the cell, such as programming, reading and/or erasing).

By way of further example, an example of a DRAM memory device 200 isillustrated in somewhat greater detail in schematic block diagram formin FIG. 2. It will be appreciated, however, that application of one ormore aspects of the present invention is in no way meant to be limitedto DRAM or specific components thereof, but that the instant discussionis merely provided for exemplary purposes. The memory device 200receives address signals A0-AN, N being an integer, in row addressbuffers 202 and column address buffers 204. The address signals becomelatched in the address buffers by use of control signals, for example,RAS (Row Address Strobe), UCAS (Upper Column Address Strobe), and LCAS(Lower Column Address Strobe) received in timing and control block 206.Desired timing and control signals are then carried from control block206 to buffers 202, 204 via leads 208, 210.

Data signals DQ0-DQM, M being an integer, are carried in parallel to adata in register 212 and a data out register 214 via leads 216, 218,respectively. A plurality of data signals (e.g., eighteen) pass inparallel from the data in register 212 to the I/O buffer 220 via lead222. Similarly, a plurality of data signals (e.g., eighteen) pass inparallel from the I/O buffer 220 to the data out register 214 via lead224. A plurality of data signals (e.g., thirty six) also pass inparallel from the I/O buffer 220 to one or more column decoders 226 vialead 228. The column decoders 226 also receive a plurality of addresssignals (e.g., eight) in parallel from column address buffers 204 vialead 230. Row decoders 232 similarly receive a plurality of addresssignals (e.g., twelve) in parallel from row address buffers 202 via lead234. The I/O buffer 220 receives timing and/or control signals from thetiming and control block 206 via lead 236. Control signals W (Write) andOE (Output Enable) connect to timing and control block 206 to indicateand control the writing and reading of data signals from the overallarray 238.

It will be appreciated that column decoders 226 and row decoders 232 canaddress individual memory cells contained within the overall array 238,and that the overall array 238 can include, for example, 18,874,368(18M) memory cells, where each memory cell is capable of containing onedata bit that can, for example, be configured in 1,048,576 words by 18bits per word (1M.times.18). It will be further appreciated that theoverall array 238 can contain a plurality of array parts (e.g., seventytwo), where respective array parts contain a plurality of memory cells(e.g., 256K). The overall array 238 can also be separated into twohalves where the row decoders 232 separate the two halves and where aplurality of array paths (e.g., thirty six) are then located on eitherside of the row decoders 232.

It will be appreciated that parts of the device, such as the memorycells and non-memory peripheral or glue logic (e.g., 202, 204, 206, 212,214, 220 as well as other elements which may or may not be shown in theexample illustrated) can include charge-sensitive interconnections ornodes which may be affected by radiation, such as by being induced withadditional charge, which can cause failures or soft errors. The errorsare referred to as soft errors because, while data may be corrupted,these elements themselves remain unaffected.

Turning to FIG. 3, a system 300 is depicted in schematic block diagramform that facilitates testing for and/or characterizing soft error orfailure rates in semiconductor products such as, for example, staticrandom access memory (SRAM). A test element 302, an input 304, an output306 and a source of radiation 308 are included in the exemplary systemshown. The test element 302 includes the item or device to be tested,and may comprise a plurality of elements of the type of element to betested (e.g., flip-flop_(A), fliP-flOp_(B), flip-flop_(C), etc.). Theelements may be connected in series as a string of elements (e.g., onthe order of a thousand or more elements) to magnify the occurrence ofsoft errors and thereby accelerate the test time. It will be appreciatedthat while an arrangement of a string of elements is described, anysuitable configuration of elements can be implemented according to oneor more aspects of the present invention. For example, the elements tobe tested can be arranged in parallel and/or as an XY array, such as thememory elements described with respect to FIGS. 1 and 2, but with aplurality of latches, flip-flops, combinatorial elements, or other typesof elements to be tested taking the place of the memory cells within thearray. Additionally, should multiple strings of elements be utilized toconcurrently test multiple types of elements, the strings may or may notinclude equal numbers of respective elements. It will be appreciated,however, that it may easier to readout data from chains having equallengths as the data output will likely be synchronized.

The radiation source 308 is located adjacent to the item and isoperative to selectively expose the item to one or more types ofradiation 310 for a particular period of time and/or at a particularintensity to mimic actual packaged conditions. Such radiation caninclude, for example, alpha particles. Upon interaction with asemiconductor device, the radiation can cause a disruption in anelectrical signal or can corrupt information stored by localized nodeswithin the device. Such a failure may be referred to as a soft errorbecause while data is corrupted, the circuit itself remains unaffected.

Data is fed into the element 302 (or string of elements) by the input304 and comes out at the output 306. By way of example, the input 304can include a data source and a clock operative to clock data into theelement or string of elements (e.g., in a known pattern such as all 1's,all 0's, a pattern of repeating 1's and 0's, or the like). The radiationsource 308 is controllable so that the element(s) 308 can be selectivelyexposed to the radiation 310 (e.g., for a particular period of time).The element(s) can, for example, be exposed to the radiation 310 as datais clocked into the element(s) and can remain exposed to the radiationas the data passes through the element(s) and subsequently exits theelement(s) 308. Alternatively, the element(s) can be filled with dataprior to being exposed to the radiation 310 and then be exposed to theradiation 310 for a particular period of time, after which the data isread out of the element(s) at the output 306 while no longer beingexposed to the radiation 310. The occurrence of failures or soft errorscan be determined, for example, by comparing input data to data output.For example, if a series of 1's were clocked into the element(s), thenthe number of 0's output would be indicative of the rate of failures forthe particular type of element being tested given the particularconditions (e.g., radiation time, type, intensity) under which the testwas performed.

Failure rates in a particular time frame can then be obtained for therespective types of elements being tested since the radiation exposuretime, type and intensity are known, and the number of elements that failduring this exposure time period can be been determined. This can beutilized to compute what an actual failure rate would be for therespective elements when the elements are implemented in the field.

Charge generated from radiation on junctions or nodes withinsemiconductor devices is sometimes referred to as collected charge. Ifthe collected charge is grater than the charge of the data state storedin a particular node, the critical charge, then a soft error is likelyto occur. Some junctions within the elements are driven to haveparticular charges, while others are floating nodes and/or are veryweakly driven. If more charge exists on a node or if a node is beingdriven to provide additional charge to compensate for radiation inducedcharge, then the probability of a soft error occurring is significantlyreduced. Thus, an element with a relatively high critical charge isdifficult to upset and does not readily exhibit soft errors. As acorollary, an element that is sensitive to the external radiation andthat has a relatively low critical charge is easily upset and canexhibit soft errors when exposed to even mild spurious charges.

Nevertheless, there is not necessarily a one-to-one correspondencebetween critical charge and soft error, and thus two elements can havesimilar critical charges yet have different soft error rates.Accordingly, while one may anticipate different elements to have similarsoft error rates, where those elements have similar critical charges,the elements may in fact have different soft error rates. Thus,developing failure rate characterization data facilitates determiningwhat the soft error rates will actually be for particular elements orlogic cells, regardless of the critical charges of those elements. Thismitigates ambiguity and/or unreliability present in resultingsemiconductor devices, and allows for an estimate of soft errorperformance.

A significant source of ionizing radiation in semiconductor devices isthe result of naturally occurring radioactive particles found inmaterial(s) utilized to fabricate semiconductor devices, such as DRAMs,SRAMs, A/D converters, and so forth, which rely on electrical charge ona capacitive node for storage of a digital signal, and thus which can besensitive to events which transport unintended charge to the node.Uranium and Thorium impurities are found in semiconductor fabricationmaterials in trace amounts and are radioactive and emit alpha particlesas they decay. The naturally occurring isotopes are U238 and Th232. Evenin relatively pure materials with Uranium/Thorium impurity levels belowparts-per-billion, the alpha emission can be high enough to cause a softerror in a semiconductor product, which can, for example, affect memorycell state retention.

Additionally, semiconductor device packaging can include, among otherthings, plastic and ceramic packages. Plastic packaging surrounds, amongother things, a semiconductor die and its bond wires and lead frame witha thickness of about 2 mm, for example. Plastic packaging can, forexample, include 27% novalac epoxy, 70% inert filler, 2% flameretardant, 1% colorant, plus accelerator, curing agent, and mold-releaseagent, where the filler can include powdered quartz. However, quartz,for example, can include natural uranium (U) and thorium (Th) impuritieswhose radioactive decay gives rise to alpha particles which can generatebursts of electrical charges that can migrate and upset stored signalcharge on a node. Ceramic packages can, for example, have a body of 90%alumina plus 10% glass with lids of gold-plated kovar, a glass sealer,and air within the package cavity. All of these components may similarlyhave alpha-emitting radioactive impurities, such as radon in cavity air,for example.

Referring now to FIGS. 4-8, a discussion is provided with regard topackaging of semiconductor devices and the interconnection of componentstherein as well as to potentially disruptive radioisotopes given offthereby. Wire bond and flip-chip type connections are discussed as theseare two common techniques for electronically coupling semiconductorcircuitry within integrated circuit packaging materials.

In FIG. 4 an exemplary wire bond type connection is depicted on a device400 that is yet to be enclosed within a packaging material. In theexample shown, a semiconductor die 402 is situated on a substrate 404,for example, a leadframe pad. The die 402 may be situated so that itsactive circuitry is facing up and that its inactive backside is facingdown toward an upper surface of the substrate 404. A plurality ofelectrically conductive bond pads 406 reside on the die 402 and areassociated with the circuitry thereon. The bond pads 406 facilitateelectrical connection between the die 402 and the outside world. Moreparticularly, the bond pads 406 provide a means by which conductivewires 408 connect the circuitry of the die 402 to pins 410 which areoperative to facilitate coupling of the device to a printed circuitboard or other substrate. It will be appreciated that while four bondpads 406, four conductive wires 408 and four pins 410 are depicted inthe example illustrated, a different number of these items may becomprised within semiconductor devices and that such elements need notbe present in equal numbers.

FIG. 5 is a representation of an exemplary device 400 such as thatdepicted in FIG. 4 encapsulated within a packaging material 412 orpackage body. The packaging material 412 serves to protect thesemiconductor die 402 and other components and/or materials containedtherein from external contaminants. The packaging material 412 alsoserves to steady and/or fix components within the device and to protectinterconnections within the device (e.g., as the device may be jostledabout during use). It will be appreciated that the packaging material412 may be formed from a variety of substances, either alone or incombination, such as plastic, epoxy, alumina, glass-ceramic and/or oneor more polymers, for example.

It will be further appreciated that additional substances may beincluded within the device, such as those, for example, that may beutilized to make up appropriate metal inter-connection layers and/orsolder balls, which may be utilized to interconnect the device to aprinted circuit board or other substrate and/or to interconnectdifferent components within the device (e.g., one or more wires 408 toone or more bond pads 406).

Additional materials may similarly be utilized to attach the die 402 tothe substrate 404, including, for example, epoxy, polyamides, metalfilled polymers, ceramic filled polymers, diamond filled polymers,silver glass, copper, aluminum, various alloys, plastics and/or othersuitable materials, either alone or in combination. An optional heatsink can also be attached utilizing, for example, a high thermalconductivity adhesive that can include, for example, an epoxy orpolyurethane, a thermal grease and/or other thermoplastic materialshaving melting points of less than 200 degrees Celsius, for example.

Turning to FIGS. 6-8, a flip-chip assembly 600 is illustrated for adiscussion of a second technique of preparing an integrated circuitpackage. In FIG. 6, the flip-chip assembly 600 includes a semiconductorchip or die 602 situated on a carrier or mounting material 604. Aplurality of electrically conductive bond pads 606 are operativelycoupled to the die 602 and circuitry thereon. Respective bumps 608 areincluded on the bond pads 606 to facilitate electrical and mechanicalcoupling of the die 602 to other components.

FIG. 7 illustrates the coupling of the flip-chip assembly 600 to anothercomponent, such as to a substrate 610 operatively coupled to activecircuitry (not shown). More particularly, the die 602 is inverted orflipped such that the bumps 608 are aligned with respective contact pads612 operatively coupled to active circuitry supported on the substrate610. Energy 614 is then applied to facilitate coupling the die 602 tothe contact pads 612 via the bumps 608. More particularly, the bumps 608generally comprise solder and/or a conductive polymer which can be curedor re-flowed through the application of heat energy 614 such that aresultant electromechanical interconnection is formed between the bondand contact pads 606, 612.

FIG. 8 illustrates the operative interconnection between the bond pads606 and the contact pads 612 via the melted or reflowed solder bumps608. It will be appreciated that a filler material 616 may be introducedin a space or gap that may exist between the die 602 and the substrate.This material 616 serves to reinforce the solder joints 608 which mayexperience stress as a result of different coefficients of thermalexpansion, different operating temperatures and/or different operatingand mechanical properties of the materials utilized within the device.The reinforcing filler material 616 generally acts as an insulator andcan be fashioned from any of a variety of materials, such as aluminumoxide, silicon oxide and/or polymeric materials, for example. It will beappreciated that the substrate can similarly include any of a number ofmaterials, alone or in combination, such as ceramic, silicone and/orglass, for example. It will be further appreciated that one or more ofthe materials in the device can give off radiation that can affectcharge sensitive nodes. For materials that are in close proximity to thedie and/or circuitry thereon, such as solder and/or packaging materials,this may be true even where the radiation is given off in very smallamounts (e.g., as from Uranium/Thorium impurity level below parts perbillion). Such radiation may have an energy range of about of about 0 to10 MeV, for example.

Turning to FIG. 9, fashioning of a radiation source 900 according to oneor more aspects of the present invention is depicted. The radiationsource 900 is designed to mimic radiation that a semiconductor devicewould be exposed to in practice by packaging and/or other materials.However, the radiation is significantly more active than that whichwould be encountered in device operation, and thus increases the rate ofsoft errors and reduces test times. To form the radiation source 900,one or more radioisotopic materials 902 are added to an encapsulationmatrix 904 under particular processing conditions 906.

The radioisotopic materials utilized are chosen such that their emissionenergies are similar to that of corruptive alpha or other particles. Theradioisotopes are also highly active (e.g., have a short half life) sothat the elements that are exposed to the radiation experience anincreased dosage of the radiation to expedite the testing process. Theradioisotope exposure may, for example, have a flux that is severalorders of magnitude more intense than that to which a device would besubjected under normal operating conditions. Error rates experienced bythe test devices are thereby enhanced and the testing time is reduced.

The radioisotopes are also imparted to the matrix so as to be relativelyuniformly distributed therein. This allows the radiation particles tobombard the elements being tested at a wide variety of different anglesand with a variety of different energies similar to what would actuallybe encountered in practice. The different energy levels are achieved, atleast in part, because the particles lose energy as they travel throughthe matrix. In particular, the more material the particles have totraverse to escape the matrix, the less energy they have when they leavethe matrix. These different angles and energy levels more accuratelymimic the randomness and spectra of radiation that the device wouldactually be exposed to in device operation.

It will be appreciated that the matrix 904 can include any of a numberof suitable materials, alone or in combination, such as metal,semiconductor and/or ceramic matrix materials comprising, respectively,platinum, stainless steel, silicon and/or alumina, for example.Additionally, radioisotropic materials 902 can include any one or moreisotopes that have alpha emissions similar to that of impurities withinpackaging and/or other materials which are the source of radiation inreal devices. By way of example, one or more types of thorium (e.g.,Th-228) can be utilized to simulate alpha emissions from mold compoundsused to encapsulate many integrated circuits (ICs). Th-228 is a goodcandidate since it is part of the natural thorium decay chain and alsohas a very high relative activity. In particular, Th-228 can be utilizedto simulate, for example, alphas emitted from thorium and uraniumimpurities in a silica filler emitted over a broad range of energies(e.g., from about 0-10 MeV). A type of americium (e.g., Am-241) can alsobe utilized, for example, to simulate emissions from flip-chip solderbumps. Am-241 is a good candidate since it has a relatively highactivity and can be utilized to simulate alphas emitted from impuritiesin lead. In particular, Am-241 simulates, for example, alphas emittedfrom polonium (e.g., Po-210) that have an emission spectrum of about0-5.3 MeV. Americium with emissions in the range of about 5-5.5 MeVuniformly distributed within the matrix could, for example, be utilizedto simulate this range as isotopes buried deep within the matrix wouldlose a significant portion of their energy while exiting the matrix.Such sources have a high intensity so that relatively short experiments(e.g., well under a few days) can be done to gather sufficient amountsof test data.

It will be appreciated that the distribution of the radioisotopicmaterials 902 within the matrix 904 can be accomplished in any of anumber of different fashions, including, for example, thermal diffusion,implantation and/or mixing of the isotope with a liquid or powderedmatrix which is then solidified by curing, annealing and/or some otherprocess. In one example, a layer 908 of the radioisotopes is depositedonto a top surface 910 of the matrix 904 and then subjected to a veryhigh temperature anneal process 906 to substantially uniformly diffusethe layer 908 into the matrix material 904.

FIG. 10 depicts a cross-sectional view of a radiation source 1000fashioned in accordance with one or more aspects of the presentinvention. The radiation source 1000 is suitable for use in a system(e.g., such as that depicted in FIG. 3) adapted to test for and/orcharacterize soft error or failure rates in semiconductor componentswhere the components are affected by different types of radiation, andwhere the sensitivity of the devices to the respective types ofradiation is dependent upon and/or a function of, among other things,device scaling whereby capacitance and/or voltages, among other things,of charge sensitive nodes are reduced.

The radiation source 1000 includes one or more radioisotopic materials1002 (e.g., atoms) distributed substantially uniformly within a matrixmaterial 1004. The radioisotopic materials 1002 serve as emission sitesand are operative to emit radiation that mimics that to which the devicebeing tested would actually encounter under normal operating conditions(e.g., due to packaging and/or other materials such as solder ballsadjacent to the semiconductor device). The radioisotopic materials 1002can be imparted into the matrix material 1004 in any suitable manner,and can comprise any suitable materials, either alone or in combination,to mimic radiation that the semiconductor device would actuallyencounter.

A layer of the radioisotopic materials can, for example, be depositedonto a top surface 1006 of the matrix material 1004 and then besubjected to a very high temperature anneal process to substantiallyuniformly diffuse the layer down into the matrix material 1004 toward abottom surface 1008 of the matrix material 1004. Additionally, theradioisotopic materials 1004 can comprise, for example, thorium (e.g.,Th-228) and americium (e.g., Am-241) to simulate alphas emitted frompackaging and/or soldering materials over a broad range of energy levels(e.g., from about 0-10 MeV). The radiation source 1000 reflects thereality that impurities are randomly distributed throughout packagingand that ions bombard chips from many different angles and at manydifferent energy levels. The radioisotopic materials 1004 are alsohighly active (e.g., have a short half life) to accelerate testing byincreasing soft error rates.

FIG. 11 graphically depicts an exemplary particle energy spectrum 1100generated from a radiation source fashioned in accordance with one ormore aspects of the present invention. An exemplary curve 1102 depictedwithin the graphical illustration is somewhat smooth and gradual as oneor more different types of isotopes having respective initial energylevels are substantially uniformly scattered throughout a matrixmaterial and travel different distances thereby losing different amountsof energy as they matriculate through and depart the matrix material.

By way of example, should the curve 1102 in FIG. 11 be derived from theexemplary radiation source 1000 illustrated in FIG. 10, the differentradioisotopic sources 1002 lose different amounts of energy as theytravel different distances through the matrix material 1004 to exit outthe bottom 1008 of the matrix material 1004 before encountering a testdevice (not shown). For example, an alpha particle emitted from aparticular emission site 1010 (e.g., of Am-241) may have an originalenergy level of about 5 MeV, but may exit out the bottom 1008 of thematrix material 1004 at an energy level of nearly 0 MeV as it has totravel through virtually the entire thickness of matrix material 1004before exiting the material, losing energy along the way. A differentalpha particle emitted from a different emission site 1012 (e.g., ofTh-228), on the other hand, may have an initial energy of about 10 MeV,and may exit out the bottom 1008 of the matrix material 1004 at nearlythe same energy level as it travels only a slight distance through thematrix material before escaping, and therefore loses very little energy.It will be appreciated that that amount of energy lost by particles,such as alpha particles, is a function of, among other things, the typeand/or density of the matrix material. In particular, more energy islost by particles traveling through mediums that have a higher density,while less energy is lost by particles traveling through mediums thathave a lower density.

FIG. 12 illustrates a cross sectional side view of a radiation source1200 wherein a plurality of emission sites 1202 (e.g., atoms) arelocated near a bottom surface 1204 of a layer of matrix material 1206that encapsulates the sites 1202. Particles emitted from the sites 1202,such as alpha particles, travel a very short distance (e.g., on theorder of about a micron or less) before exiting out the bottom surface1204 of the material 1206 to encounter a test device. As such, theparticles lose very little energy and impact the test device withrespective energy levels very similar to their original energy levels(e.g., between about 4-9 MeV depending upon the types of type ofmaterials utilized, such Am-241 and/or Th-228, for example).

FIG. 13 is a graphical depiction of an exemplary alpha particle energyspectrum 1300 from a radiation source, such as that depicted in FIG. 12,wherein radioisotope atoms are configured in a tight distribution near asurface 1204 of a radiation source. Multiple emissions 1302 areillustrated within the graphical illustration having very well definedand extremely tight energy distributions. The curves correspond to therespective energy levels of different types of radioisotope sources 1202included near the surface 1204 of the matrix material 1206 (e.g.,Am-241, Th-228). Particles, such as alpha particles, emitted from thesesources are emitted at specific energy levels that act like fingerprintsfor the particular types of isotope sources.

Nevertheless, while the discreet curves 1302 in FIG. 13 may be useful toidentify different types of isotopes in the radiation source, this is aless than accurate approximation of alpha spectra actually encounteredby semiconductor devices in practice (e.g., from packaging and/or othermaterials such as solder balls located near semiconductor circuitry).The broad spectrum depicted in FIG. 11 is a much more accuraterepresentation of radiation from actual sources since real sources donot produce mono-energetic radiation having very specific energy peaksin their spectra.

By way of further example, FIG. 14 graphically depicts an example of analpha spectrum 1400 from a substantially thick Th-232 sample. It can beseen that the distribution is much smoother than if it would have comefrom a much thinner sample. FIG. 15 demonstrates just such a situation.In particular, FIG. 15 graphically depicts an example of an alphaspectrum 1500 generated from a thin film of Th-232. The emissions inFIG. 15 are significantly discreet and much less gradual than thatpresented in FIG. 14.

Use of such mono-energetic producing sources can lead to erroneous softerror rate values, particularly if they are extrapolated directly from atest system. Thus, test data acquired from such sources may need to bemanipulated to be useful. The data may have to be transformed, forexample, by running it through three dimensional device simulations.Such transformations, however, can be costly, time intensive and mayproduce results that are inaccurate and/or otherwise unsatisfactory.

Such sources may also have very low activities, which can necessitatelong test times (e.g., on the order or days or more). For example,naturally occurring Th232 and U238 both have half lives over ten billionyears thus their activities are inherently very low. To the contrary,one or more aspects of the present invention improve the throughput oftesting. Soft error rate testing in accordance with one or more aspectsof the present invention facilitates quickly and accurately determininga soft error rate from an experiment by utilizing a distributed source(e.g., of alpha particles) to obtain failure rate data and then merelyaccounting for the increased activity of the source relative to what thedevice would actually experience in device operation (e.g., as apackaged part) without the need for running time-consuming, expensiveand/or potentially inaccurate simulations.

Use of other sources, such as an ion beam, for example, would notprovide the broad spectrum of particles, nor the accelerated test timein such a cost effective and efficient manner. In an ion beam, forexample, something generally equivalent to a helium nucleus may beaccelerated with a high voltage to simulate an alpha particle. However,it may take several million electron volts or more to achieve thenecessary acceleration to adequately mimic the characteristics of analpha particle. Additionally, ion beams do not allow more than oneenergy level to be selected. Furthermore, since it is a beam, during asingle test, multiple angles of incidence are not possible. An ion beamwould thus have to be operated at many different accelerator energiesand maneuvered to many different orientations to emit ions at differentangles as occurs naturally, and this would have to be done for eachdevice being tested. This translates to a significantly increasedtesting time (e.g., on the order of a hundred or more times longer thanthat which is contemplated herein). Furthermore ion beam equipment isvery specialized, expensive, and requires a large dedicated laboratoryspace.

One or more aspects of the present invention thus provide a mechanismthat facilitates the expeditious and efficient testing of soft errorrates, that in turn allows a choice to be made at a design stageregarding which particular element(s) to include in a product design toyield a final product that has a particular failure or soft error rate.Aspects of the present invention provide a metric to designers regardingwhich element(s) to utilize in producing a final product to achievedesired results (e.g., levels of product reliability). By way ofexample, designers who have access to ASIC cell libraries, including,for example, flip-flop_(A), flip-flop_(B), flip-flop_(C), etc. canselectively utilize theses elements as is needed to create desireddevices. Obtained failure rate data, can also, for example, be utilizedin association with simulation and modeling techniques so that anestimate of reliability can be provided for different element typesand/or final products. This may be advantageous as it may be impracticalto test every different type of logic element and develop failure ratecharacterization data therefore.

As such, a certain level of product reliability can be built in at thedesign stage. One or more aspects of the present invention can alsofacilitate diagnosis of existing product performance. For example, byknowing what elements are included in an existing product, the failurerates of those elements can be obtained from a database of failure ratecharacterization data to determine or predict what the failure or softerror rate of the existing product should be, and thus whether theactual failure rate of the existing product provides an indication thatthe product is or is not functioning as intended.

With reference now to FIGS. 16 and 17, in accordance with one or moreaspects of the present invention, methodologies 1600 and 1700 are,respectively, illustrated for fashioning and utilizing a radiationsource suitable for use in a test system adapted to test for soft erroror failure rates in one or more semiconductor devices, where the devicesfail as a result of exposure to radiation from the radiation source, andmore particularly where charge sensitive nodes, that have everdecreasing capacitances and voltages as a result of device scaling, areadversely affected by exposure to the radiation. The radiation mimicsthat to which the device would actually be exposed in practice (e.g.,from packaging and/or other materials, such as solder, adjacent tosemiconductor circuitry), but is more active (e.g., has a short halflife) to increase the rate of failure and expedite the testing process.

Although the methodologies 1600, 1700 are illustrated and describedhereinafter as a series of acts or events, it will be appreciated thatthe present invention is not limited by the illustrated ordering of suchacts or events. For example, some acts may occur in different ordersand/or concurrently with other acts or events apart from thoseillustrated and/or described herein, in accordance with one or moreaspects of the present invention. In addition, not all illustrated stepsmay be required to implement a methodology in accordance with thepresent invention. Furthermore, any methodologies according to thepresent invention may be implemented, to varying degrees, in associationwith the formation and/or processing of structures that may or may notbe illustrated and described herein.

Methodology 1600 begins at 1602 wherein a layer of radioisotopes isdeposited onto a top surface of an encapsulating matrix material. Theradioisotopic materials utilized are chosen such that their emissionenergies are similar to, but more active (e.g., have a shorter halflife) than that of corruptive alpha or other particles associated withthe packaging environment that the die/circuitry will experience inoperation. The elements that are exposed to the radiation thus get anincreased dosage of the radiation to exacerbate soft error rates andexpedite the testing process.

The matrix can include any of a number of suitable materials, alone orin combination, such as metal, semiconductor and/or ceramic matrixmaterials comprising, respectively, platinum, stainless steel, siliconand/or alumina, for example. The radioisotropic materials can similarlyinclude any one or more isotopes that have alpha emissions similar tothat of impurities within packaging and/or other materials which giveoff radiation in real devices. By way of example, the radioisotropicmaterials can include thorium (e.g., Th-228) and/or americium (e.g.,Am-241) to give off radiation over a broad range of energies (e.g., fromabout 0-10 MeV) to simulate, respectively, alpha emissions from moldcompounds used to encapsulate many integrated circuits (ICs) and solderbumps.

The methodology 1600 then advances to 1604, and ends thereafter. At1604, the matrix material and layer of radioisotopes are subjected to ahigh temperature anneal to substantially uniformly distribute theradioisotopes within the matrix material. The anneal process causes someof the radioisotopes to move from the top surface of the matrix materialdown toward a bottom surface of the matrix material in a generallygraduated fashion. The radioisotopic materials serve as emission sitesand are operative to emit radiation particles that mimic radiation thatsemiconductor devices would actually encounter in practice (e.g., due topackaging and/or other materials such as solder balls adjacent tosemiconductor circuitry). The radiation particles, in operation, exitthe matrix material through the bottom surface, for example, and thesubstantially uniform distribution of radioisotopes within the matrixmaterial allows the radiation particles to encounter test element(s) ata wide variety of different angles and with a variety of differentenergies similar to what would actually be encountered in practice. Thedifferent energy levels are achieved, at least in part, because theparticles lose energy as they travel through the matrix. In particular,the more material the particles have to traverse to escape the matrix,the less energy they have when they leave the matrix.

It will be appreciated, however, that the distribution of theradioisotopic materials within the matrix can be accomplished in any ofa number of different fashions, including, for example, thermaldiffusion, implantation and/or mixing of the isotope with a liquid orpowdered matrix which is then solidified by curing, annealing and/orsome other process.

When implemented within a test system, the radiation source is utilizedto selectively expose one or more test element(s) to radiation. Moreparticularly, the radiation source is controllable so that theelement(s) can be selectively exposed to the radiation (e.g., for aparticular period of time). The test element(s) may comprise a pluralityof elements of a particular type of element to be tested (e.g.,flip-flop_(A), flip-flop_(B), flip-flop_(C), etc.), which may beconnected in series as a string of elements (e.g., on the order of athousand or more elements) to magnify the occurrence of soft errors andthereby accelerate the test time. Such a plurality of elements of aparticular element type to be tested can, for example, be strungtogether as synchronously clocked serial first in, first out (FIFO)buffers or chains, where the output of one element feeds into or acts asan input to a subsequent element in the chain.

Turning to FIG. 17, a methodology 1700 is disclosed for utilizing aradiation source, such as that described above, in a test system adaptedto test for soft error or failure rates in one or more semiconductordevices or elements. The methodology 1700 begins at 1702 wherein data isclocked into a string of the devices or elements. A data source (e.g.,of all 1's, all 0's, alternating 1's and 0's or any other known patternof 1's and 0's) can, for example, be coupled to the string of elementsand cycled into the elements by a clock signal which is also coupled tothe string of elements. By way of example, should all 1's be fed intothe string, a first 1 is fed in and clocked so that it goes into a firstelement in the string. A second 1 is then fed in and clocked so that thefirst 1 is advanced to a second element and the second 1 fills the firstelement. The process continues until the respective elements in thestring contain 1's. At 1704, the radiation source is then operativelyassociated with the string so as to selectively expose the one or moretest element(s) to the radiation.

At 1706 data is read out of the elements as the data passes through thelength of elements and exits out through the last element in the chain.At 1708 data input into the chain is compared to data read out of thechain to determine a soft error rate. Variations between the knownclocked in pattern and the output data are indicative of failures orsoft errors. The methodology then ends after 1708.

It will be appreciated that the ordering of the acts is not absoluteand/or to be construed in a limiting sense. For example, when theradiation source is implemented with a test system the methodology canbe carried out in static as well as dynamic modes. In a static mode, therespective elements can be filled with data (e.g., all 1's) prior tobeing exposed to radiation from the radiation source. The radiation isthen applied for a particular period of time and then taken away fromthe string of elements before the data is read out from the elements.The known clocked in data stream is then compared to the output data tosee if any soft errors have occurred. In a dynamic mode, data of a knownpattern (e.g., all 1's, all 0's, alternating 1's and 0's) can be quicklyand continuously written to the element strings while the elements areexposed to radiation from the radiation source, and data output from thestrings is constantly read out and compared to input data while theelements remain exposed to the radiation.

Additionally, one or more acts of the methodology can be carried outconcurrently to develop failure rate data for more than one type ofelement operating under the same (or different) test conditions. In sucha scenario, an input source and a clock would likely be connected torespective chains of different type of elements to be tested. In thismanner, data of a known pattern can be clocked into each of therespective chains and data output from the chains can be compared tothis input data to see if any failures or soft errors have occurred inany of the respective chains of elements. In one example, the lengths ofthe chains would be the same for each of the types of elements todevelop coincident test data. The lengths of the chains should also belong enough to develop a sufficient amount of test data in a reasonableamount of time. For example, chain lengths on the order of a thousand ormore elements per chain should allow test data to be developed withinseveral hours. As scaling continues and sensitivity increasesaccordingly, the lengths of chains can be reduced, which may allow moretypes of elements to be tested simultaneously as more chains can besqueezed onto a single test chip.

Failure rates in a particular time frame can then be obtained for therespective types of elements being tested since the radiation exposuretime, type and intensity are known, and the number of elements that failduring this exposure time period can be been determined. This can beutilized to compute what an actual failure rate would be for therespective elements when the elements are implemented in the field. Itwill be appreciated that the foregoing is not intended to only pertainto special logic structure, but also has application to moreconventional test structures (e.g., for DRAM/SRAM testing).

Although the invention has been shown and described with respect to oneor more implementations, equivalent alterations and/or modifications maybe evident based upon a reading and understanding of this specificationand the annexed drawings. The invention includes all such modificationsand alterations and is limited only by the scope of the followingclaims. In particular regard to the various functions performed by theabove described components (assemblies, devices, circuits, etc.), theterms (including a reference to a “means”) used to describe suchcomponents are intended to correspond, unless otherwise indicated, toany component which performs the specified function of the describedcomponent (i.e., that is functionally equivalent), even though notstructurally equivalent to the disclosed structure which performs thefunction in the herein illustrated exemplary implementations of theinvention. In addition, while a particular feature of the invention mayhave been disclosed with respect to only one of several implementations,such feature may be combined with one or more other features of theother implementations as may be desired and advantageous for any givenor particular application. Furthermore, to the extent that the terms“includes”, “having”, “has”, “with”, or variants thereof are used ineither the detailed description or the claims, such terms are intendedto be inclusive in a manner similar to the term “comprising.”

1. A method of forming a test radiation source suitable for use in atest system operative to test for soft error or failure rates in one ormore semiconductor devices, wherein test radiation from the testradiation source mimics radiation that the devices would actuallyencounter in device operation, the method comprising: substantiallyuniformly distributing one or more radioisotopes into a matrix material,wherein the radioisotopes act as emission sites and emit the testradiation.
 2. The method of claim 1, wherein substantially uniformlydistributing one or more radioisotopes into a matrix material furthercomprises: depositing a layer of the one or more radioisotopes onto atop surface of the matrix material; and subjecting the matrix materialand the layer of radioisotopes to a high temperature anneal to cause atleast some of the radioisotopes to move down toward a bottom surface ofthe matrix material.
 3. The method of claim 2, wherein the radioisotopesmove from the top surface down through the matrix material toward thebottom surface in a generally graduated fashion.
 4. The method of claim2, wherein the one or more radioisotopes have a relatively short halflife such that the devices experience an increased exposure to the testradiation as compared to the amount of the radiation that the deviceswould actually receive in device operation, and such that the devicesexhibit an enhanced soft error rate so that testing time is therebyreduced.
 5. The method of claim 2, wherein the matrix material comprisesat least one of platinum, stainless steel, silicon and alumina.
 6. Themethod of claim 2, wherein the one or more radioisotopes comprise atleast one of uranium, thorium and americium.
 7. The method of claim 6,wherein the one or more radioisotopes comprise at least one of Th-228and Am-241.
 8. The method of claim 2, wherein the one or moreradioisotopes mimic radiation from at least one of solder, plasticpackaging, ceramic packaging, quartz, epoxy, alumina, glass, polyamides,metal filled polymers, ceramic filled polymers, diamond filled polymers,silver glass, copper, aluminum, polyurethane, thermal grease andthermoplastic.
 9. The method of claim 8, wherein plastic packagingcomprises at least one of novalac epoxy, inert filler, flame retardant,colorant, accelerator, curing agent and mold-release agent.
 10. Themethod of claim 8, wherein plastic packaging comprises about 27% novalacepoxy, about 70% inert filler, about 2% flame retardant and about 1%colorant.
 11. The method of claim 8, wherein ceramic packaging comprisesat least one of alumina, glass and kovar.
 12. The method of claim 8,wherein ceramic packaging comprises about 90% alumina and about 10%glass.
 13. The method of claim 2, wherein the one or more radioisotopesmimic alpha emissions from mold compounds used to encapsulatesemiconductor devices or solder balls employed in flip-chip typepackaging.
 14. The method of claim 2, wherein the test radiation isemitted from the bottom surface of the matrix material and wherein thesubstantially uniform distribution of the radioisotopes allows theradiation to encounter the one or more semiconductor devices beingtested at a wide variety of different angles and with a variety ofdifferent energies similar to what would actually be encountered indevice operation.
 15. The method of claim 1, wherein substantiallyuniformly distributing one or more radioisotopes into a matrix materialfurther comprises at least one of thermal diffusion, implantation,mixing of the isotope with a liquid or powdered matrix material, curingand annealing. 16-24. (canceled)